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PCBA Store / 2025-09-18
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In the realm of modern electronics manufacturing, ensuring the integrity and functionality of a printed circuit board (PCB) is paramount. Among the various inspection methods used during PCB assembly, flying probe testing (FPT) has emerged as a highly effective and flexible solution, particularly for low to medium volume production and prototyping. In PCB design, design for testing plays a crucial role. There are different techniques and methods to ensure an error-free board.
In-circuit testing tests the workings of a PCB assembly, i.e., white box testing. Here, we use electric probes to check the populated PCB for shorts, opens, and values of resistance, capacitance, and other basic qualities. Traditionally, this method relies on a fixture-based approach known as a “bed of nails,” where spring-loaded pogo pins make contact with designated test points on the board.
The custom ICT fixture required for a new PCBA assembly can be awfully expensive, especially for a complex PCBA. Moreover, it takes time to manufacture these fixtures, making ICT more suitable for high-volume production runs rather than prototypes or small batches.
Flying probe testing uses test probes that “fly,” i.e., the test probes move from test points to other test points as per instructions given by the specific software program that is written for the board under test. Unlike ICT, no custom fixture is needed—making FPT an ideal choice for prototype and low-volume PCB assembly.
This hi-tech, latest machine provides maximum performance, increased test speed, and low to medium volume runs. The flexibility offered by FPT makes it suitable even for densely populated boards with limited access to traditional test points.
Nets linked to the active components must be accessible on the same side of the test probes. This allows features like “openfix” options during testing. For SMD components as well, accessibility rules should be maintained. For better efficacy, maintain a distance of 2.8 mm between the probe and the probe sensor.
Preferred contact points of the FPT process are: Test pads without solder resist; Vias; Through-holes; PTH and SMD component pads.
Test point dimensions depend on probe type. The minimum size is 6 mils (20 mils recommended). The spacing between one test point to another should be a minimum of 10 mils and 20 mils.
For vias: The diameter should be between 8 to 20 mils (10 mils recommended). Vias must be occluded and free from the solder resist.
For SMD componentsapply a solder pad that is longer than the component pin. This enables the testing probe to contact the test point not on the pin but on the soldering pad itself.
The board is secured with a clamp/conveyed via, either horizontally or vertically . For horizontal testers , additional support should be provided every 150 mm or according150 to design needs.
Maximum board dimensions of 600 x 1010 mm for testers, while maximum board dimensions of 600 x 540 mm for testers apply.
Component height impacts tester compatibility. Component height calculations for vertical testers: Maximum board height + components on either side: 40 mm, including the board width. For horizontal testers: Maximum board height + components on the head side: 40 mmbottom side: 100 mm
Creating an FPT program begins offline using CAD files. Every FPT provides a Test Program Generating Application that runs on a PCrequires the PCB assembly’s BOM and the ECAD filein ODB++ format or IPC-2581 format or native ECAD design file format
Once generated and loaded into an FPT system : the probeswill contact the pads (component pads and test pads if any) and the unmasked viasand make measurements thereof.
Measurements are processed internally using built-in instruments such as signal generators and multimeters. By a complex scheme of excitation signals, FPT tries to isolatethe component segments between the testing probes fromother components on the board.
FPT also includes optical checks: An FPT is also equipped with a camera to help in inspecting component polarity automatically.
This feature enhances net isolation efficiency. The phase difference measurement unit – PDM – sends a high-frequency signal betweensections’ one endpointmeasures phase at other endpoint – thus estimating their phase difference.
HVS identifies high-resistance isolation defects missed by PDM. We conduct HVS by applying high-voltage pulses between signal lines Typical voltages range from 500V–1000V while maintaining low power usage.
To prevent damage during isolation tests: Micro-short tests can avoid such damageby applying a low voltage before gradually increasing Reversing voltage polarity may reveal semiconductor-like shorts embedded in multilayer stacks.
Q1: Is flying probe testing suitable for high-volume production?
No. It is best suited for prototypes or small-to-medium production due to its slower speed compared to ICT.
Q2: What files are needed?
Flying probe testing requires ODB++ files.
Q3: Can it detect polarity issues?
Yes. An FPT is also equipped with a camera to help in inspecting component polarity automatically.
Q4: Does it require special hardware?
Only standard access points like vias or exposed pads; no expensive fixtures are needed.
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